Supply

Root Cause & Dependencies

The mechanical driver of the memory squeeze: HBM's 3× wafer footprint reallocated from conventional DRAM, funded by hyperscaler AI capex.

Wafer Allocation · HBM vs Conventional DRAM

100% stacked share of DRAM wafer starts. 2026E–2027E forecast.

Source: TrendForce, SEMIUpdated 2026-08-31

Hyperscaler Capex vs DRAM Price

Bars = combined AMZN/MSFT/GOOG/META capex ($B). Line = average DRAM contract index.

Source: Company IR guidance

Wafer Flow (approx.)

Stacked bar substitute for a Sankey — share of wafer starts by end-market.

Source: Modeled from TrendForce & SEMI

Concentration & Dependency Map

Netherlands

EUV Lithography

ASML

Sev 5/5

100% market share · €38.8B backlog · High-NA $370M+

Taiwan

Advanced Packaging (CoWoS)

TSMC

Sev 5/5

Capacity sold out through 2027 · 77% of TSMC Q2'26 rev from ≤7nm

South Korea / US

DRAM Oligopoly

Samsung / SK Hynix / Micron

Sev 4/5

>90% of DRAM revenue · SK Hynix HBM3e 56.4% share

Japan

Silicon Wafers

Shin-Etsu + SUMCO

Sev 3/5

~53% of global 300mm wafer supply

China

Rare-Earth Refining

China

Sev 4/5

~90% of downstream processing

Japan / Korea

Substrate & MLCC

Japan / Korea

Sev 3/5

MLCC lead times 8→20+ weeks; ABF substrate qualification gated